1) Field of the Invention
This invention relates generally to the fabrication of semiconductor devices and particularly to the fabrication of variable work function gates for fully silicided (FUSI) devices.
2) Description of the Prior Art
In order to cater to different product applications, ultra large scale integrated (ULSI) circuits generally include a multitude of transistors with different threshold voltage, Vt values. This is true even for the same polarity devices, for e.g., for NMOSFETs, there is a need to fabricate high Vt, low Vt, and regular Vt devices on the same platform. Typically, the threshold voltages are tuned using Vt adjustment implants into the channel. However, excessive channel doping can degrade carrier mobility due to impurity scattering.
Relevant technical developments in the patent literature can be gleaned by considering the following.
J. H. Sim, H. C. Wen, J. P. Lu, and D. L. Kwong, Dual Work Function Metal Gates Using Full Nickel Silicidation of Doped Poly-Si, IEEE ELECTRON DEVICE LETTERS, VOL. 24, NO. 10, OCTOBER 2003 631-
Lahir S. Adam, Christopher Bowen, and Mark E. Law, On Implant-Based Multiple Gate Oxide Schemes for System-on-Chip Integration, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 3, MARCH 2003 589-600,
U.S. Pat. No. 6,589,866 Besser, et al. Jul. 8, 2003—Metal gate with PVD amorphous silicon layer having implanted dopants for CMOS devices and method of making with a replacement gate process.
U.S. Pat. No. 6,555,453—Xiang, et al. Apr. 29, 2003—Fully nickel silicided metal gate with shallow junction formed.
US Patent Application 20040106261 A1 Huotari, et al.—Method of forming an electrode with adjusted work function.
US Patent Application 20020008257—RNAK, et al. Jan. 24, 2002